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ESPCLOCK4 - Monitoring supply voltage via ADC

To monitor the battery pack voltage (4 x AA; max ~6V), I hooked up GPIO32 (maps to ADC1_CHANNEL_4) to a voltage divider consisting of 2 x 10K resistors. This divides the max voltage in half, giving us 3V, which is clear of the max 3.3V input voltage accepted by the ESP32 ADC pins.

To initialize the ADC channel so that it can be used by ULP code, this function is used:

void init_adc() {
  adc1_config_width(ADC_WIDTH_BIT_12);
  adc1_config_channel_atten(ADC1_CHANNEL_4, ADC_ATTEN_DB_11);
  adc1_ulp_enable();
}

I created 2 new RTC_SLOW_MEM variables:

enum {
  ...
  VDD_ADC,        // Supply voltage measured by ADC
  VDD_LOW,        // Low voltage threshold
}

The ADC reading ranges from 0 to 4095 in a slightly non-linear mapping, so I use this code to figure out the right ADC value for the low voltage threshold for the battery pack (target: 1.05V x 4 = 4.2V).

#define SUPPLY_VLOW (1050*4)    // 4 x 1.05V

// Map given ADC value to corresponding voltage
uint32_t adc_to_voltage(uint16_t adc) {
  esp_adc_cal_characteristics_t adc_chars;
  esp_adc_cal_characterize(ADC_UNIT_1, ADC_ATTEN_DB_11, ADC_WIDTH_BIT_12, 1100, &adc_chars);
  return esp_adc_cal_raw_to_voltage(adc, &adc_chars);
}

for (uint16_t adc=2000; adc<4096; adc++) {
  uint32_t v = adc_to_voltage(adc);
  if (v >= SUPPLY_VLOW/2) {
    RTCVAR_SET(VDD_LOW, adc);
    RTCVAR_SET(VDD_ADC, adc+1);
    break;
  }
}

The ULP code below makes a series of 8 ADC readings, computes the average and writes it to VDD_ADC just in case the main CPU needs to use the value. Then it compares the average reading with VDD_LOW. If lower, it wakes the main CPU with a new wake reason WAKE_VDD_THRESHOLD_LOW. The main CPU will then stop the clock and write the clock time to the EEPROM.

// R0 = R0 + ADC reading from GPIO33
#define X_ADC() \
   I_ADC(R1, 0, VDD_CHANNEL), \
   I_ADDR(R0, R0, R1)

// Sum 8 x ADC readings from GPIO33
#define X_ADC_SUM() \
   X_ADC(), \
   X_ADC(), \
   X_ADC(), \
   X_ADC(), \
   X_ADC(), \
   X_ADC(), \
   X_ADC(), \
   X_ADC()

   ...
   I_MOVI(R0, 0),
   X_ADC_SUM(),                  // R0 = sum(8 x ADC readings)
   I_RSHI(R0, R0, 3),            // Divide by 8 to get average ADC reading
   X_RTC_SAVE(VDD_ADC, R0),      // Save to RTCMEM[VDD_ADC] for main CPU
   X_RTC_LOAD(VDD_LOW, R1),
   X_RTC_LOAD(VDD_ADC, R2),   
   I_SUBR(R0, R1, R2),           // VDD_LOW - VDD_ADC  
   M_BXF(_READ_ADC_DONE),        // Wake if VDD_ADC < VDD_LOW
   X_RTC_SAVEI(WAKE_REASON, WAKE_VDD_THRESHOLD_LOW),
   I_WAKE(),
   I_HALT(),
M(_READ_ADC_DONE),
   ...

In the main setup() code, all we have to do is to deal with another wake reason:

  #define WAKE_VDD_THRESHOLD_LOW 2
  
...
  else {
    // Wake up due to ULP
    uint16_t reason = RTCVAR(WAKE_REASON); RTCVAR_SET(WAKE_REASON, 0);
    switch(reason) {
      case WAKE_VDD_THRESHOLD_LOW:
        // Stop clock and write time to EEPROM
        break;
      case WAKE_RESET_BUTTON: 
        esp_hard_restart();
    }
  }
  ...

The test went quite well when I hooked up GPIO32 to a variable voltage source. When the voltage drops below 4.2V, the main CPU is woken up with the correct wake reason. 

ESPCLOCK1 / ESPCLOCK2 / ESPCLOCK3 / ESPCLOCK4

Comments

  1. Can you share the code for espclock4 in GitHub, especially the one with the PWM modification?

    TIA

    ReplyDelete
    Replies
    1. Sure. I have uploaded the torture test code here:
      https://github.com/victor-chew/espclock4

      Delete

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